Questa® VIP validates IDesignSpec generated IP
In our domain, we automatically generate registers and memory interface which can interface with all the standard bus protocols. If […]
September 19, 2023
DVCon 2014 wrap-up
DVCon 2014 was a wrap. It was marked by record attendance and participation both by the DV Community and
Great turnout at the Design Automation Conference
We had a great first day at DAC. All the talk about recession and economic doom were hard to believe.
It’s DAC time of the year again!
Started blogging again, this time from our own blogging site.
DAC Day 2: System On Chip Design Challenges Addressed by Agnisys
System on Chip Design Challenges – The Highlight of DAC Day 2 It was a very busy day for Agnisys
Ongoing Semiconductor Industry Challenges
The Design Automation Conference is over for the year. Attendee leads or inquiries, to be more precise, have been collected
Is cheap EDA tool an oxymoron?
Business schools teach us that the way to set the price on a product has nothing to do with the
It’s All In The Sequence
Whether dealing with SoCs or a disaster in space, determining the correct set of steps is vital. No project
DVCON 2014: Strong Focus on both, Design & Verification
Here we go! The Design and Verification Conference (DVCON 2014) is round the corner. Make sure you register for the
Why Users Care about EDA Partnerships
Recently, I’ve been thinking about how vital partners are to the EDA industry in general, and for Agnisys in particular.
Welcome Back to DAC – in Person – in San Francisco
Most engineers involved in the design, verification, and validation of electronic systems are familiar with the Design Automation Conference (DAC).
