AI Fuels the Next Generation of Specification Automation

 

Agnisys was founded on a deceptively simple idea: automatic generation of as many IP and system-on-chip (SoC) development files as possible from executable golden specifications. There is a lot underlying this capability: identification of precise, unambiguous specification formats, powerful generation technology, and the challenges of turning an idea into the successful IDesignSpec™ Suite of products. Advances in artificial intelligence (AI) are enabling further evolution in specification automation.

Executable Specification Formats

Since SoC and IP specifications have traditionally been written in natural languages such as English, we first considered using these specifications to generate design, verification, validation, programming, and documentation files. Automating the process of interpreting specifications and producing the files needed for the various development stages could replace a great deal of human effort and provide benefits to every project team. 

What we quickly found is that natural language is challenging to automatically parse, analyze, and interpret. A decade ago, technology simply did not exist to extract the type of details we needed from traditional design specifications. However, continuing to use purely manual methods to generate project files was unacceptable. This led to differing interpretations by different teams, resulting in inconsistent files and a lengthy process to find and fix the inconsistencies.

Fortunately, we found that there were quite a few unambiguous specification formats for specific aspects of SoC and IP development. For example, registers could be specified using SystemRDL, IP-XACT, Excel spreadsheets, and more. We also invented a few executable formats ourselves. In all cases, we developed tools that could automatically generate consistent files for all project teams, updating these instantly whenever specifications changed.

AI and Natural Language

The original idea of AI was also deceptively simple: enable a computer to do everything a human brain can. Sometimes called “general intelligence,” the full scope of human thinking was a high goal for a computer to achieve. Early AI researchers gave a great deal of thought to what sort of everyday mental tasks would benefit from being automated. Natural language processing (NLP) was one domain that held great promise and was an early focus.

Computer pioneer Alan Turing proposed “the imitation game,” now commonly called the Turing test, to determine whether a machine could exhibit intelligent behavior equivalent to, or indistinguishable from, that of a human. Some of the earliest applications of AI were chat “therapists” that sometimes fooled humans into thinking that they were interacting with other humans. Although crude by today’s standards, the general concept lives on in modern chat programs.

Text-to-speech converters and digital assistance are two more applications that benefit from NLP. In the SoC and IP development world, intelligent interpretation of natural language is precisely the technology needed to transform traditional specifications into the files needed for design, verification, validation, programming, and documentation files. Naturally, Agnisys engineers began looking at how to leverage AI and NLP several years ago. We have made great progress!

Register Generation from Datasheets

Agnisys today offers many types of specification automation, from IP blocks to top-level SoC assembly. However, register automation remains our most widely used and best known capability. Virtually all SoCs and IP contain programmable, memory-mapped registers that allow software to configure the hardware, control its operation, and gather status. We wanted to use AI to generate a wide range of register files from a specification written in English.

We set an extremely high bar: using existing design specifications, most commonly in the form of PDF files, rather than self-contained register descriptions. This would provide enormous flexibility for our users. For example, if they are using an existing SoC containing registers, they could simply convert the PDF datasheet into a C/C++ register header file for inclusion in their embedded programs and device drivers.

Within our traditional register automation flow, our users would no longer have to specify their registers in a specific executable format. As long as they have a natural language SoC or IP specification that defines the registers and fields, they could generate the SystemVerilog design files, UVM testbench files, and C/C++ headers automatically. They could also output the register descriptions in standard formats such as IP-XACT and SystemRDL for documentation and portability to other tools. 

We are proud to announce the immediate availability of the site SmartDatasheet for users to try. It could not possibly be simpler to use: just upload any PDF datasheet containing a register specification, push a button, and wait for the result to appear via email. The initial release generates C/C++ header files, but future versions will have options for additional formats such as SystemVerilog, Universal Verification Methodology (UVM), VHDL, JSON, and IP-XACT.

Leveraging LLM Technology

SmartDatasheet follows a multi-step process to analyze specification documents, primarily PDFs, and automatically generates design and verification files using innovative large language models (LLMs). These are very large deep learning models that are pre-trained on vast amounts of data. We use a “mixture-of-experts” LLM implementation in which specialized models (experts) are applied and orchestrated to optimize for performance.

When a user uploads a specification, it is securely transmitted to our private servers. All communication remains strictly between Agnisys and the user, ensuring no data leakage. The data is then securely passed through our LLM implementation. The PDF is ingested and converted to a format optimized for LLMs. Leveraging accelerated cloud computing, we extract individual indexes and generate register networks for analysis. All processing is run solely on Agnisys systems, so you have no exposure on public AI backends.

The LLM implementation uses the generated networks to produce structured output that can be further processed by Agnisys tools in the IDesignSpec Suite, enabling fast generation of the required formats. Our LLM implementation is enhanced through a novel approach called function calling, which enables efficient interaction when the LLMs are connected to external tools. This allows our models to act as large action models (LAMs) that can comprehend and execute complex tasks.

Our function calling process enables the use of developer-tailored functions to calculate specific register details, such as address maps and offsets. This method also addresses the common issue of hallucination in LLMs by leveraging these functions to ensure accurate outputs. We have opted to prioritize the input documentation over any outputs given by our LLMs to ensure the accuracy of the generated code even if a proposed mixture of expert results differs.

Sequence Specification with Natural Language

Another aspect of specification automation for registers is generating the sequences used to configure and program them. We announced about a year ago that we had successfully applied AI, NLP, machine learning (ML), and deep learning (DL) technology to this challenge. We employ auto-sequence detection, in which our AI algorithms meticulously dissect sequences specified in natural language and convert them into executable formats. These formats include SystemVerilog, for use in UVM testbenches, and C/C++, for use in drivers and embedded code.

Our algorithms methodically process each word one at a time, steadily generating the output information. We employ a bidirectional layer, a smart approach where we analyze the input text from both forward and backward directions. This significantly enhances our model’s ability to classify sequences. Our algorithms are fine-tuned to predict the most likely expected output sequences based on the natural language specifications.

Assertion Generation from English

Assertions are another domain in which natural language specifications can be analyzed unambiguously by creative application of NLP. At iSpec.ai, anyone can write assertions in English and translate them into SystemVerilog Assertions (SVA) at the push of a button. Statements of design intent such as “if A goes high and B goes low 3 cycles later, then C will be asserted in 4 more cycles” are handled easily. iSpec.ai also translates SVA into English descriptions, valuable for understanding and documenting assertions in licensed or inherited SystemVerilog design and verification code.

Conclusion

AI methods, especially ML and LLM, are being deployed in many key applications for the design and verification of IP and SoCs. Agnisys has made several important contributions to this industry trend with the development of iSpec.ai, sequence specification and generation, and SmartDatasheet. We put a lot of effort into keeping on top of ever-evolving AI technology and look for ways to leverage it for the benefit of our users and better efficiency. Please stay tuned for more exciting news over time.