Ongoing Semiconductor Industry Challenges
The Design Automation Conference is over for the year. Attendee leads or inquiries, to be more precise, have been collected and booths stored away for next year. The EDA industry has left the Austin Convention Center.
As always, DAC was its usual place for companies large, small and emerging to project a positive image, demonstrate their newest or most popular offerings, see new faces, catch up with longtime business associates and partners. And network. The exhibit floor was an intense three days. After all, sell, sell, sell was the business at hand.
The trends we saw and heard about this year don’t seem much different from years past. For example, functional verification companies were reminded that 70% of the project effort is devoted to verification and no one’s happy about this number. For the past 20 years or more, we’ve been unable to bring the percentage into line. That needs to change.
As for designs, 80% go over deadline by an average of 44%, another area that needs the EDA industry’s focused attention. Perhaps not so surprising is the headcount number –– 80% of product cost. While no one should be surprised by that human capital number, that may be one of the more containable areas for change. The EDA industry has the purview to make engineering teams more effective and productive. Certainly, it can help ensure the processes are efficient through appropriate tools and methodologies.
Which begs the question: How does an engineering team improve its time-to-market ratio while reducing costs? Three obvious areas are effectiveness, efficiency and appropriate tools for the job.
No one wants to hear they’re ineffective. Avoiding that label often starts with attention on core competencies and stripping away responsibilities that don’t fit the skills. After all, nothing’s worse than working at a job with the wrong set of skills. Once that’s sorted, automating mundane tasks is a must. In the functional verification space, engineers can find a plethora of software and hardware tools designed to automate repetitive tasks. However, we can do more.
Taking a holistic approach to streamlining and making the process more efficient and automated goes a long way to making an engineering team effective and productive. Actually, it’s effective companywide because it’s pointless and nonproductive to duplicate effort, but especially so for chip design and verification. A great illustration is the debug process. If a verification engineer uses a single source, he or she will be able to eliminate and reduce the number of bugs, keeping things on track.
Certainly, it will help manage change, as will the appropriate tools. Drawing from the early 1990s, EDA bandied about the term correct by construction. Perhaps, it wasn’t something the industry could deliver because it’s not a term heard much any longer. In today’s environment, it could be the cheapest way to catch bugs. Even better, verification tools that offer that benefit would have a shorter learning curve.
Before next year’s DAC in Austin, Texas, again, let’s assume the EDA industry will have cracked at least a few of the bigger challenges. If we have to solve one, I vote for reducing the verification time, getting products to market faster.
