SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES

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Does UVM sometimes make you feel stupid?

Somewhere in the deep trenches of a UVM-based verification project, an engineer teeters on the verge of insanity...

How to Create Test Sequences for RISC-V Cores and SoCs Automatically

For decades, the idea of an open-source central processing unit (CPU) core was virtually unknown—let alone using it for commercial...

A pragmatic approach towards consolidation in the semi Industry

Consolidation is not a new phenomenon for the semiconductor Industry. Although the industry has shown no consolidation through almost all...

AUGER: Celebrating Our Users

In my last post, I discussed the importance of partners to the EDA industry in general, and to Agnisys in...

Specification Automation for Designers

Improved technology for remote learning emerged as one positive outcome amid the challenges of the last year and a half. ...

Unlock ISO 26262 Certification Success with Agnisys for ASICs

Within the automotive sector, the safety of electrical and electronic systems (E/E) is mission-critical. As many of you likely already...

Efficient Global Development: Block Integration & Chip Assembly

There is something anticlimactic and tedious about interconnecting the hundreds or thousands of design blocks that make up a modern...
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