SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES

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AI-Based Sequence Detection for IP and SoC Verification & Validation

A couple of years back at the Design Automation Conference (DAC), as I strolled through the exhibit floor, I couldn’t...

Doing What We Can in Challenging Times

Most of us have faced difficulties in our personal and professional lives, and have worked our way through them. But...

New Product Advances Productivity for SystemVerilog UVM Verification

Agnisys just released DVInsight-Pro version 2.0 with many new features that enable much more productive SV/UVM code development. Do you...

Automating UVM-Based IP and SoC Functional Verification

Ask a bunch of engineers about the Universal Verification Methodology (UVM) and you’ll hear two distinct sets of responses, sometimes...

Automating IP and SoC Development

The last month has been busy for all of us at Agnisys, with three important virtual events. As I previewed...

Understanding the IP-XACT Standard and its Importance in Design Reuse

  Introduction to IP-XACT IP-XACT is an IEEE standard, specifically IEEE 1685, providing a standardized XML schema for describing and...

Out of the Office – Lessons from a client visit in Edinburgh

As we travel professionally, sometimes we tend to miss some of the scenery along the way. We can get a...

Winding Up an Eventful Year

As we close in on the final days of 2021, I can’t help but think back over the events of...
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