SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES
By Louie de Luna, Agnisys Director of North American Sales and Marketing...
I’m thrilled. Finally, we have a customer who sees the value that IDesignSpec brings for his company. We are indeed...
By Louie De Luna, Agnisys Chief Product Evangelist...
By Louie De Luna, Agnisys Director of Sales and Marketing...
I’m yet to meet a person who doesn’t like simplicity in engineering. I do believe that Electronic Design Automation (EDA)...
Ending the last day of DAC strong with a presentation of DVinsight, a Universal Verification Methodology IDE The highlight of...
IDesignSpec generates several outputs from a single spec. We started out as a simple tool that just dealt with registers...
The first day of the Design Automation Conference for Agnisys was exciting. We experienced a higher traffic flow than Monday...
The input format of Duolog is now supported by IDesignSpec with outputs including Verilog, UVM, CHeader, and SystemC. The outputs generated...
