SEMICONDUCTOR DESIGN AND VERIFICATION ARTICLES

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Navigating the IDesignSpec Universe with AgniGPT- Your Intelligent Companion

Introduction In the ever-evolving landscape of technology and design, navigating through intricate documentation can often feel daunting. Recognizing this challenge...

Automating the UVM Register Abstraction Layer (RAL)

The Universal Verification Methodology (UVM) has become a standard for verifying complex digital designs. One of the key components of...

PRM (Programmer’s Reference Manual) Support in IDS-Validate

Introduction Agnisys has developed a Programmer’s Reference Manual (PRM) that serves as a comprehensive documentation resource for “programming sequences” and hardware...

Unveiling RAG Systems: A Practical Exploration

Introduction As our product portfolio has evolved over the last two decades, so has the capabilities of the various tools...

Understanding SystemRDL: Comprehensive Tutorial with Examples

SystemRDL (Register Description Language). SystemRDL is a language used for describing the register maps of digital systems, particularly in the...

CMSIS support in IDesignSpec

IDesignSpecTM (IDS) is a product suite that improves the productivity of FPGA/ASIC, IP/SoC, and System Development teams. These products encompass...

Getting Started with IP-XACT for IP Design

Introduction IP-XACT stands for Intellectual Property exchange-Advanced Configuration and Integration of IP components. It is an IEEE standard (IEEE 1685)...

5 Reasons for Using an Open Source Register Automation Tool | Agnisys

Register automation is an integral part of IP and SoC development. Long ago,  design, verification, firmware, and documentation teams preferred...
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