The Design and Verification Conference is the premier conference on the application of languages, tools, methodologies, and standards for the design and verification of electronic systems and integrated circuits. Agnisys, the pioneer and industry leader in Golden Executable Specification Solutions™ will be presenting a tutorial session at DVCon EU titled, “IP-XACT Industrial Practices”  on November 14, 2023/ 02:15- 03:45 PM, T1.3 at Forum 4 . Agnisys part of the tutorial focuses on “Spec to SoC : IP generation and integration using IP-XACT 2022”

About Accellera Tutorial:

Rising complexity and shrinking market windows are driving many front-end SoC development challenges. Among these challenges are: effective/efficient management of IP integration and verification, testbench development (component integration and IP configuration), register testcase development, and the unavoidable changes that occur during the design process that impact register definition, location, type, or implementation – all tedious, error-prone, and time-consuming! 

In this tutorial, learn how can you maintain design consistency and comprehension across the SoC development teams with a single specification for all information, and  description for all registers, all representations are generated from a single source, Also, know how to best leverage an industry standard that can support successful IP delivery: IP-XACT, within an automated workflow.

The certified IDesignSpec™ Solution Suite from Agnisys leverages a golden executable specification to capture and centralize registers, sequences, and connectivity for Intellectual Property (IP) and System-on-a-Chip (SoC) projects. Which helps market makers accelerate their front-end SoC, FPGA, and IP development – let us help you ensure your project success and accelerate delivery of Heterogeneous Systems Correct-by-Construction!

Join us at DVCon EU for an enlightening session on IP-XACT, the industry-standard XML schema for intellectual property (IP) descriptions., we will dive into the transformative potential of IP-XACT in simplifying Design and Verification workflows. From its role in facilitating seamless IP integration to its impact on reusability and design portability, we’ll explore how IP-XACT is revolutionizing the way we approach complex system-on-chip (SoC) designs. Whether you’re a seasoned engineer or a newcomer to IP-XACT, this tutorial  promises valuable insights and practical strategies for harnessing the full potential of this crucial standard. Don’t miss out on this opportunity to stay at the forefront of modern semiconductor design methodologies.

Agnisys can help you Accelerate Your Frontend SoC, FPGA, and IP Development

• Automate Design, Verification, & Validation from Executable Specifications
   Capture & Centralize Registers, Sequences, Connectivity for IP/SoCs
  Leverage IP-XACT, PSS, SystemRDL, YAML, RALF, Word, Excel, Template

• Increase Productivity
  • Auto-generate Collateral for Entire Project Development Team
  • AI / ML Powered Test Generation
  • Methodology Services

• Reduce Risk
  • Certified IDesignSpec™ Solution Suite
  • Standardized Workflows
  • Correct by Construction
  • Push Button Capabilities