IDS-IPGenTM
Specification Automation for Glue Logic Generator
Automatically Keep Your IP Blocks Synchronized with the Specification
Leveraging IP and reusing parts of previous designs can save your SoC project team a huge amount of time and effort. The downside of using fixed IP blocks is that you may not be able to get exactly what they want. It may be possible to modify and customize IP, but this incurs the risk of breaking the standard functionality. Agnisys IDS-IPGen solves this problem by automatically generating IP blocks from specifications that are highly configurable and customizable.
IDS-IPGen supports a wide variety of standard IP blocks as well as the specification of finite state machines (FSMs), data paths, signals, and other parts of your custom IP blocks. For both standard and custom blocks, IDS-IPGen generates RTL models, UVM verification models, and tests that provide high functional and code coverage right out-of-the-box.
More Details:Â Custom IP Design and AI-Based Verification
How IDS-IPGen Enhances Your Development Process
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