Webinar: Introduction to System RDL Part One
SystemRDL 2.0 Register Description Language is the industry standard from Accellera used for describing control/status registers and memories in circuit designs.
We hope you enjoy the webinar.
eBook: How Agnisys Eliminates Redundancies in Semiconductor Design, Verification, and Validation
Overcoming the weaknesses of traditional natural language specifications requires writing the specifications in a precise format rather than natural language, and making this format executable so that tools can generate as many files as possible for the design, verification, programming, validation, and documentation teams. Such a solution is available today.
In my most recent blog post, I reminisced about childhood toys that let you construct complex structures from simple...
As kids, many engineers enjoyed toys that involved assembling complex designs from simple elements. Whether it was wooden blocks...
As semiconductor designs grow exponentially in complexity, verification has become the single largest consumer of engineering time and resources...
