Webinar: Introduction to System RDL Part One
SystemRDL 2.0 Register Description Language is the industry standard from Accellera used for describing control/status registers and memories in circuit designs.
We hope you enjoy the webinar.
eBook: How Agnisys Eliminates Redundancies in Semiconductor Design, Verification, and Validation
Overcoming the weaknesses of traditional natural language specifications requires writing the specifications in a precise format rather than natural language, and making this format executable so that tools can generate as many files as possible for the design, verification, programming, validation, and documentation teams. Such a solution is available today.
AI can now generate a UVM testbench directly from a verified SoC specification, replacing much of the repetitive setup work...
Our previous post covered how to make your specifications golden, including completeness, unambiguity, precision, consistency, accuracy, accessibility, and traceability. The...
When we started providing specification automation solutions, we focused on supporting as wide a range of formats as possible. Now...
