IDesignSpecTM comprehensively manages register maps for complex IP/SoC designs. Create a register specification ONCE, and automatically generate industry standard/custom code and documentation from it.

IVerifySpecTM is a verification management
tool that combines requirements, verification
plans & results into a single web portal. It improves
product quality and engineer productivity.

Moreover it is simulation vendor & methodology neutral.

    

Welcome!

 

Since its first inception in 2007, Agnisys has created several solutions to make user's life simpler. Our customers have noticed a common theme in all our tools -- they are easy to use, and provide immediate value by improving the development process.

 

IVerifySpec is a tool for product verification teams. It enables them to create agile verification plans and monitor execution of the plan. It integrates data from a variety of sources and creates analysis reports that helps keep the project on track and yield high quality results.

 

IDesignSpec is a tool for managing hardware registers through the development process. Engineers typically use document editors to capture hardware register specification. IDesignSpec is available as a plug-in for all popular document editors to capture those registers and directly generate code from it.

 

We look forward to solving your problems with these solutions.

 

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News

June 10th 2010

IDesignSpec supports OVM
Register Package 1.0

Jan 29th 2010

Agnisys joins Altera's ACCESS
program.

Dec 1st 2009

Agnisys joins Synopsys' VMM
Catalyst program.

Oct 1st 2009

Events

Product Showcase Road-trip where we come to you and show you customized, personalized solutions for your team. Contact us to book appointment.

Anaheim/San Jose : June 11 - 17
Chicago : June 18
Boston : June 21 - 25

Meet us at DAC,

Exhibit booth #359.
Agnisys will present new
products and major enhancements.

Book a DAC demo

June 14-16 2010

Customers

Partners

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